Advanced Computer Architecture Assignments

CEG4136 Computer Architecture III

Instructor: Dr. Miodrag Bolic


News

Catalog Description

Instructor and Teaching assistants

Time and Locations

Required Texts

Additional documents

Prerequisites

Grades

Course Outline

Laboratory

Assignments

Last change: August 29, 2013

NEWS

CATALOG DESCRIPTION

Multiprocessor systems: vector processors, array processors, SIMD, MIMD systems. Interconnection networks.Multiprocessor architecture and programming.Multiprocessing control and algorithms.The PRAM model and algorithms.Message-passing models and algorithms.Scheduling and arbitration algorithms.Parallel virtual machine.Message passing interface. Performance measures for multiprocessor systems.

INSTRUCTOR AND TEACHING ASSISTANTS

Course staff

Name

E-mail address

Fall 2011 Office Hours

Location

Instructor

Miodrag Bolic

mbolic@site.uottawa.ca

Wednesdays, 12:00-13:00,

CBY A-616

Teaching assistants

By e-mail

TIME and LOCATIONS

Activity

Time

Location

Room

 LEC

 Monday, 10:00-11:30

 LMX

 Room: 342

 LEC

 Wednesday, 08:30-10:00

LMX

 Room: 342

LAB

Friday 14:30-17:30

SITE

 

TUT

Monday 14:30 – 16:00

SITE

F0126

 TEXTS

Parallel Computer Organization and Design, by Michel Dubois, MuraliAnnavaram, Per Stenström, August 2012

Recommended:

Advanced Computer Architecture and Parallel Processing, by Hesham El-Rewini and Mostafa Abd-El-Barr, John Wiley and Sons, 2005.

http://ca.wiley.com/WileyCDA/WileyTitle/productCd-0471467405.html

Advanced Computer Architecture Parallelism, Scalability, Programmability, by  K. Hwang, McGraw-Hill 1993.

Computer Architecture: A Quantitative Approach, byJohn L. Hennessy, David A. Patterson, David Goldberg, Morgan Kaufmann; 3rd edition, 2002.

Multiprocessor Systems-on-Chips (The Systems on Silicon Series)by Wayne Wolf, Morgan Kaufmann, 2004.

Advanced Computer Architectures – A Design Space Approach by DescoSima, Terence Fountain and Peter Kascuk, Pearson, 1997.

 ADDITIONAL DOCUMENTS

Appendix E from Computer Architecture: A Quantitative Approach together with the slides.

PREREQUISITES

:

CEG3131.

 

GRADES

30% Particitation and Short Questions

40% Final

30% Labs

The final mark will be computed using the weighted sum of ALL of the above components. You need to have 50% of the exam component that includes Final and “Participation and Short Questions”

There will be quizzes every week. You will be required to prepare for the class and to read in advance. The quiz will include questions covered during last week and topics that you read in preparing for the class.

EXAMS (FINAL)

·         All exams are closed book.

·         Only material cover in the class, tutorials and labs will be on the exam.

QUESTIONS ABOUT MARKS

If you have a question about a mark you have received, this is the procedure (all other questions on marks will be ignored)

·         Schedule an appointment with the T.A. to see the work (if required).

·         Fill out and sign form (obtained from T.A., or download it here – thanks to dr. Andy Adler for developing the form)

·         Submit to T.A.

·         You will receive a response within two weeks.

GRADING

Name

Quiz

Lab

Project or literature study

Exams

Miodrag Bolic

-

-

-

Final

Iype Joseph

All quizzes

Labs

-

-

 

COURSE OUTLINE

Introduction: Chapter 1

Cache memories: Chapter 4.3

Parallel-programming model abstractions and message passing MP systems: Chapter 5.2 and 5.3

Bus-based shared memory systems: Chapter 5.4

Scalable and cache only memory systems: Chapters 5.5 and 5.6

Interconnection networks: design space, switching and topologies: Chapters 6.2, 6.3 and 6.4

Routing and switching architectures: Chapters 6.5 and 6.6

Background and coherence: 7.2 and 7.3

Consistency: 7.4

Synchronization: 7.5

Relaxed memory model and speculative violation of memory orders: 7.6 and 7.7

Multithreading: 8.2 and 8.3

Chip processor architectures and programming models: 8.4 and 8.5

LABORATORY

SLIDES AND MADETIAL FROM 2012

Note: Lecture slides will in general be available for download before the lecture.

Lecture scribing from 2006 (Disclaimer: please note that all the material is written by students and did not go through peer review process. Be careful and critical when reading this document. Please send me your comments if you see typos or some problems with the material).

Topic number

Topic

Scribing from 2006

Literature

T1.   

Introduction, Review of cache memories

Lecture 1,2

T2.   

Performance analysis

Lecture 3

T3.   

Parallel models

Lecture 4

T4.   

Buses

Lecture 5

T5.   

Dynamic interconnection networks

Lecture 6,7

T6.   

Static networks

Lecture 8

T8.   

Shared memory systems

Lecture 9

T9.   

Cache coherence

Lecture 10,11

T10

GPU architectures: Slides, Doc, OpenCL: Slides, Doc

Lecture 12,13

T11

OpenMP, OpenAcc

Lecture 14

Presentations:

·         OpenMP: An API for Writing Portable SMP Application Software: pdf (Slides 9-13, 17-19, 21-27)

http://www.openmp.org/presentations/sc99/sc99_tutorial.pdf

·         ICC’s High Performance Computing: OpenMP

http://www.llnl.gov/computing/tutorials/openMP/

OpenAcc 

http://www.ccs.tsukuba.ac.jp/CCS/files/slides/1205_LuizDeRose.pdf

T11.                        

Routing 12

Lecture 15

T13.                        

Deadlock

Lecture 16

T14.                        

Message passing systems, MPI programming

Lecture 17

T15.                        

Embedded multicores

CSCI-564 Advanced Computer Architecture

Lectures will be held on Tuesdays and Thursdays from 9:30am to 10:45am in Marquez Hall 122.

Wednesdays 3:30PM-5PM or by appointment

This course will cover advanced topics in computer architecture, including pipelining, caching, virtual memory, storage, multi-core processing and power.

You should have taken Computer Organization or similar. You should be able to program in C or C++.

  • Class participation (10%)
  • Homework (20%)
  • Midterm (15%)
  • Final (15%)
  • Project (40%)
Deadlines: All deadlines are posted in the syllabus. Due time is always 11:59:59PM on the due date.

Required: Computer Architecture, Fifth Edition: A Quantitative Approach, John L. Hennessy and David A. Patterson.

Recommended: Synthesis Lectures on Computer Architecture. Link: http://www.morganclaypool.com/toc/cac/1/1

The following is the general policy for all CS courses for your reference.

  • If the project is an individual effort project, you are not allowed to give code you have developed to another student or use code provided by another student. If the project is a group project, you are only allowed to share code with your group members.
  • You are encouraged to discuss programming projects with other students in the class, as long as the following rules are followed:
    • You view another student's code only for the purpose of offering/receiving debugging assistance. Students can only give advice on what problems to look for; they cannot debug your code for you. All changes to your code must be made by you.
    • Your discussion is subject to the empty hands policy, which means you leave the discussion without any record [electronic, mechanical or otherwise] of the discussion.
  • Any material from any outside source such as books, projects, and in particular, from the Web, should be properly referenced and should only be used if specifically allowed for the assignment.
  • To prevent unintended sharing, any code stored in a hosted repository (e.g., on github) must be private. For group projects, your team members may, of course, be collaborators.
  • If you are aware of students violating this policy, you are encouraged to inform the professor of the course. Violating this policy will be treated as an academic misconduct for all students involved. See the Student Handbook for details on academic dishonesty.


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